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Library · Chargebacks · How to run this

Verifi CDRN packet pack bay is not Midigator case-close pack bay

How to run thisChargebacks3 steps
CalculatorVerifi representment pack lag · Calculator lives in the articleOpen

Open a Verifi CDRN packet pack bay. Clock assembly from start to ready. Park packs next to that span. Label the span VF pack-build hours — Midigator case-close bays never feed this CDRN cut.

Pair: Representment pack lag under Chargebacks. Midigator twin: MG pack-build. Day twin: VF lag days.

CDRN packet pack bay fields

Start hour — Hour Verifi began building the evidence pack on the CDRN packet pack bay.

Ready hour — Hour Verifi marked that pack complete on the same bay.

Packs — Verifi pack rows inside the start → ready slice.

VF pack-build hours = ready hour − start hour. When VF pack-build hours fatten, clear the Verifi assembly pile on that MID — empty chips stay empty.

What not to do

Skip inventing VF pack-build hours. Skip loading Midigator case-close or Kount dispute-queue pack CSVs into Verifi start/ready boxes. Skip folding VF pack-hole % into ready-hour fields. Skip fusing MIDs when one Verifi CDRN packet pack bay owns the pack stack.

Related: Chargebacks, MG pack-build, VF lag days, VF pack-hole.

Procedure

  1. Type start hour, ready hour, and packs.
  2. Read VF pack-build hours.
  3. Clear assembly pile when VF pack-build hours are material.

Failure modes

  • Inventing VF pack-build hours.
  • Loading Midigator case-close or Kount dispute-queue pack CSVs into Verifi boxes.
  • Folding VF pack-hole % into ready-hour fields.

Worked example

None on this page yet. When one lands it will be a real case: what broke, the number, and what changed. Not a composite.

Glossary

VF pack-build hours
Ready hour − Start hour on one Verifi CDRN packet pack bay.

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FAQ

Is this Midigator representment pack lag?
Verifi CDRN packet pack bay vs Midigator case-close pack bay. [Representment pack lag](/manuals/midigator-representment-pack-lag) stays on Midigator. Start / ready hours belong on this Verifi bay.
Is this Verifi representment lag days?
Pack assembly hours vs filed→closed CDRN days. [Representment lag days](/manuals/verifi-representment-lag-days) ends when the CDRN packet ledger closes. Here the clock ends when the evidence pack is ready.
What VF pack-build hours should I invent?
None. Pull start hour, ready hour, and packs from the same Verifi CDRN packet pack bay.